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FSCM0765R
Features
Green Mode Fairchild Power Switch (FPSTM)
* Internal Avalanche Rugged SenseFET * Low Start-up Current (max 40uA) * Low Power Consumption under 1 W at 240VAC and 0.4W Load * Precise Fixed Operating Frequency (66kHz) * Frequency Modulation for low EMI * Pulse by Pulse Current Limiting (Adjustable) * Over Voltage Protection (OVP) * Over Load Protection (OLP) * Thermal Shutdown Function (TSD) * Auto-Restart Mode * Under Voltage Lock Out (UVLO) with Hysteresis * Built-in Soft Start (15ms) OUTPUT POWER TABLE
230VAC 15%(3) PRODUCT FSCM0565RJ FSCM0765RJ FSCM0565RI FSCM0765RI FSCM0565RG FSCM0765RG Adapter(1) 50W 65W 50W 65W 70W 85W Open Frame(2) 65W 70W 65W 70W 85W 95W 85-265VAC Adapter(1) 40W 50W 40W 50W 60W 70W Open Frame(2) 50W 60W 50W 60W 70W 85W
Table 1. Maximum Output Power
Notes: 1. Typical continuous power in a non-ventilated enclosed adapter measured at 50C ambient. 2. Maximum practical continuous power in an open-frame design at 50C ambient. 3. 230 VAC or 100/115 VAC with doubler.
Application
* SMPS for VCR, SVR, STB, DVD and DVCD * Adaptor * SMPS for LCD Monitor
Related Application Notes
* AN-4137: Design Guidelines for Off-line Flyback Converters Using Fairchild Power Switch (FPS) * AN-4140: Transformer Design Consideration for off-line Flyback Converters using Fairchild Power Switch * AN-4141: Troubleshooting and Design Tips for Fairchild Power Switch Flyback Applications * AN-4148: Audible Noise Reduction Techniques for FPS Applications
Typical Circuit
DC OUT AC IN
Description
The FSCM0765R is an integrated Pulse Width Modulator (PWM) and SenseFET specifically designed for high performance offline Switch Mode Power Supplies (SMPS) with minimal external components. This device is an integrated high voltage power switching regulator which combines an avalanche rugged SenseFET with a current mode PWM control block. The PWM controller includes integrated fixed frequency oscillator, under voltage lockout, leading edge blanking (LEB), optimized gate driver, internal soft start, temperature compensated precise current sources for a loop compensation, and self protection circuitry. Compared with a discrete MOSFET and PWM controller solution, it can reduce total cost, component count, size, and weight while simultaneously increasing efficiency, productivity, and system reliability. This device is a basic platform well suited for cost effective designs of flyback converters.
PWM
Ilimit Vfb Vcc
Drain
GND
Figure 1. Typical Flyback Application
Rev.1.1.0
(c)2005 Fairchild Semiconductor Corporation
FSCM0765R
Internal Block Diagram
N.C 5 VCC 3 Vcc Good Vref 0.3/0.5V
+
Drain 1 Internal Bias
8V/12V
Freq. Modulation
Vcc Idelay Vcc
OSC IFB
PWM 2.5R
S
Q
FB 4 6 I_limit
R
Q
R
Soft start 0.3K
Gate Driver LEB
VSD VCC
S Q
2 GND
VOVP TSD Vcc UV Reset Vcc Good
R Q
Figure 2. Functional Block Diagram of FSCM0765R
2
FSCM0765R
Pin Definitions
Pin Number 1 2 3 Pin Name Drain GND VCC Pin Function Description This pin is the high voltage power SenseFET drain. It is designed to drive the transformer directly. This pin is the control ground and the SenseFET source. This pin is the positive supply voltage input. Initially, During start up, the power is supplied through the startup resistor from DC link. When Vcc reaches 12V, the power is supplied from the auxiliary transformer winding. This pin is internally connected to the inverting input of the PWM comparator. The collector of an optocoupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 6.0V, the over load protection is activated resulting in shutdown of the FPS. This pin is not connected. This pin is for the pulse by pulse current limit level programming. By using a resistor to GND on this pin, the current limit level can be changed. If this pin is left floating, the typical current limit will be 3.0A.
4
Feedback (FB)
5 6
N.C. I_limit
Pin Configuration
FSCM0765RJ D2-PAK-6L
FSCM0765RI I2-PAK-6L
FSCM0765RJ
FSCM0765RI
6 : I_limit 5 : N.C. 4 : FB 3 : Vcc 2 : GND 1 : Drain
6 : I_limit 5 : N.C. 4 : FB 3 : Vcc 2 : GND 1 : Drain
FSCM0765RG TO-220-6L
FSCM0765RG
6. I_limit 5. N.C. 4. FB 3. Vcc 2. GND 1. Drain
Figure 3. Pin Configuration (Top View)Absolute Maximum Ratings
3
FSCM0765R
(Ta=25C, unless otherwise specified.) Parameter Drain-Source (GND) Voltage (1) Drain-Gate Voltage (RGS=1M) Gate-Source (GND) Voltage Drain Current Pulsed @ Tc = 25C @ Tc =100C Continuous Drain Current (TO-220) @ Tc = 25C @ Tc =100C Supply Voltage Analog Input Voltage Range Total Power Dissipation (D2-PAK,I2-PAK) Total Power Dissipation (TO-220) Operating Junction Temperature Operating Ambient Temperature Storage Temperature Range ESD Capability, HBM Model (All pins except Vfb) ESD Capability, Machine Model (All pins except Vfb) ID ID VCC VFB PD PD TJ TA TSTG
(2)
Symbol VDSS VDGR VGS IDM ID ID
Value 650 650 30 21 5.3 3.4 7 4.4 20 -0.3 to VCC 83 145 Internally limited -25 to +85 -55 to +150 2.0 (GND-Vfb = 1.5kV) (Vcc-Vfb = 1.0kV) 300 (GND-Vfb = 250V) (Vcc-Vfb = 100V)
Unit V V V ADC ADC ADC ADC ADC V V W W C C C kV
Continuous Drain Current (D2-PAK, I2-PAK)
-
V
Notes: 1. Tj = 25C to 150C 2. Repetitive rating: Pulse width limited by maximum junction temperature.
Thermal Impedance
Parameter Junction-to-Ambient Thermal Junction-to-Case Thermal (D2-PAK, I2-PAK) Junction-to-Case Thermal (TO-220)
Note: 1. Free standing with no heat-sink under natural convection 2. Infinite cooling condition - Refer to the SEMI G30-88.
Symbol
Value 1.5 0.9
Unit C/W C/W C/W
JA JC(2) JC(2)
(1)
4
FSCM0765R
Electrical Characteristics
(Ta = 25C unless otherwise specified.) Parameter SenseFET SECTION Drain Source Breakdown Voltage Zero-Gate-Voltage Current Static Drain Source on Resistance (1) Output Capacitance Turn on Delay Time Rise Time Turn off Delay Time Fall Time CONTROL SECTION Initial Frequency Modulated Frequency Range Frequency Modulation Cycle Voltage Stability Temperature Stability (2) Maximum Duty Cycle Minimum Duty Cycle Start Threshold Voltage Stop Threshold Voltage Feedback Source Current Soft-start Time Initial Frequency BURST MODE SECTION Burst Mode Voltages (2) VBH VBL
Notes: 1. Pulse Test: Pulse width 300S, duty 2% 2. These parameters, although guaranteed at the design, are not tested in mass production.
Symbol
Condition
Min.
Typ.
Max.
Unit
BVDSS IDSS RDS(ON) COSS TD(ON) TR TD(OFF) TF
VGS = 0V, ID = 250A VDS = Max, Rating VGS = 0V VGS = 10V, ID = 2.3A VGS = 0V, VDS = 25V, f = 1MHz VDD= 325V, ID= 5A (MOSFET switching time is essentially independent of operating temperature)
650 -
1.4 100 25 60 115 65
500 1.6 -
V A
pF
ns -
FOSC Fmod Tmod FSTABLE FOSC DMAX DMIN VSTART VSTOP IFB TSS TLEB
VCC = 14V, VFB = 5V 10V VCC 17V -25C Ta +85C VFB = GND VFB = GND VFB = GND -
60 0 75 11 7 0.7 10 -
66 3 4 1 5 80 12 8 0.9 15 300
72 3 10 85 0 13 9 1.1 20 -
kHz kHz ms % % % % V V mA ms ns
Vcc = 14V Vcc = 14V
0.4 0.24
0.5 0.3
0.6 0.36
V V
5
FSCM0765R
PROTECTION SECTION Peak Current Limit(2) Over Voltage Protection Thermal Shutdown Temperature(1) ShutdownDelay Current Shutdown Feedback Voltage TOTAL DEVICE SECTION Startup Current Operating Supply Current(3) Istart IOP(MIN) IOP(MAX) VCC = 10V, VFB = 0V VCC = 20V, VFB = 0V 2.5 5 mA 20 40 A ILIM VOVP TSD IDELAY VSD VFB = 4V VFB > 5.5V VCC = 14V, VFB = 5V 2.64 18 130 3.5 5.5 3 19 145 5.3 6 3.36 20 160 7 6.5 A V C A V
Notes: 1. These parameters, although guaranteed at the design, are not tested in mass production. 2. These parameters indicate the inductor current. 3. This parameter is the current flowing into the control IC.
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FSCM0765R
Comparison Between FSDM07652R and FSCM0765R
Function Frequency Modulation N/A FSDM07652R FSCM0765R Available * Modulated frequency range (DFmod) = 3kHz * Frequency modulation cycle (Tmod) = 4ms * Programmable using external resistor (3A max) * N/A (Requires a startup resistor) * Startup current: 40uA (max)
Pulse-by-pulse Current Limit * Internally fixed (2.5A) Internal Startup Circuit * Available
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FSCM0765R
Typical Performance Characteristics
(These Characteristic Graphs are Normalized at Ta= 25C.)
1.60 Start Threshold Voltage (Normalized to 25) -50 -25 0 25 50 75 100 125 Junction T emperature () 1.40 1.20 1.00 0.80 0.60
1.20 1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ( )
Start up Current (Normalized to 25)
Figure 4. Startup Current vs. Temp
Figure 7. Start Threshold Voltage vs. Temp
1.20 1.12 1.04 0.96 0.88 0.80
1.20 Stop Threshold Voltage (Normalized to 25)
Initial Frequency (Normalized to 25)
1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ( )
-50
-25
0
25
50
75
100 125
Junction T emperature ( )
Figure 5. Stop Threshold Voltage vs. Temp
Figure 8. Initial Freqency vs. Temp
1.20 Maximum Duty Cycle (Normalized to 25) FB Source Current (Normalized to 25) 1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ( )
1.20 1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ( )
Figure 6. Maximum Duty Cycle vs. Temp
Figure 9. Feedback Source Current vs. Temp
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FSCM0765R
Typical Performance Characteristics (Continued)
(These Characteristic Graphs are Normalized at Ta= 25C.)
1.20 1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ( ) Shutdown Delay Current (Normalized to 25) Shutdown FB Voltage (Normalized to 25)
1.20 1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ()
Figure 10. ShutDown Feedback Voltage vs. Temp
Figure 13. ShutDown Delay Current vs. Temp
1.20 1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ( ) Burst Mode Disable Voltage (Normalized to 25) Burst Mode Enable Voltage (Normalized to 25)
1.20 1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ()
Figure 11. Burst Mode Enable Voltage vs. Temp
Figure 14. Burst Mode Disable Voltage vs. Temp
1.20 1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ( ) Operating Supply Current (Normalized to 25) Maximum Drain Current (Normalized to 25)
1.20 1.12 1.04 0.96 0.88 0.80 -50 -25 0 25 50 75 100 125 Junction T emperature ()
Figure 12. Macimum Drain Current vs. Temp
Figure 15. Operating Supply Current vs. Temp
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FSCM0765R
Functional Description
1. Startup: Figure 16 shows the typical startup circuit and transformer auxiliary winding for the FSCM0765R application. Before the FSCM0765R begins switching, it consumes only startup current (typically 25uA) and the current supplied from the DC link supply current consumed by the FPS (Icc), and charges the external capacitor (Ca) that is connected to the Vcc pin. When Vcc reaches start voltage of 12V (VSTART), the FSCM0765R begins switching, and the current consumed by FSCM0765R increases to 3mA. Then, the FSCM0765R continues its normal switching operation and the power required for this device is supplied from the transformer auxiliary winding, unless Vcc drops below the stop voltage of 8V (VSTOP). To guarantee the stable operation of the control IC, Vcc has under voltage lockout (UVLO) with 4V hysteresis. Figure 17 shows the relation between the current consumed by the FPS (Icc) and the supply voltage (Vcc).
I sup
min
= ( 2 V line
min
- V start ) -----------
1 R str
where Vlinemin is the minimum input voltage, Vstart is the start voltage (12V) and Rstr is the startup resistor. The startup resistor should be chosen so that Isupmin is larger than the maximum startup current (40uA). If not, Vcc can not be charged to the start voltage and FPS will fail to start up. 2. Feedback Control: The FSCM0765R employs current mode control, as shown in Figure 18. An opto-coupler (such as the H11A817A) and a shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the Rsense resistor makes it possible to control the switching duty cycle. When the reference pin voltage of the KA431 exceeds the internal reference voltage of 2.5V, the H11A817A LED current increases, thus pulling down the feedback voltage and reducing the duty cycle. This event typically happens when the input voltage is increased or the output load is decreased. 2.1 Pulse-by-pulse Current Limit: Because current mode control is employed, the peak current through the SenseFET is determined by the inverting input of the PWM comparator (Vfb*) as shown in Figure 18. When the current through the opto transistor is zero and the current limit pin (#5) is left floating, the feedback current source (IFB) of 0.9mA flows only through the internal resistor (R+2.5R=2.8k). In this case, the cathode voltage of diode D2 and the peak drain current have maximum values of 2.5V and 3A, respectively. The pulse-by-pulse current limit can be adjusted using a resistor to GND on the current limit pin (#5). The current limit level using an external resistor (RLIM) is given by:
R LIM 3A I LIM = -----------------------------------2.8k + R LIM
C DC
AC line (Vline min - V line max ) ISUP Rstr Da
VC C
FSCM 0765R
IC C Ca
Figure 16. Startup Circuit
ICC
Vo Vfb
H11A817A
CB
Vcc Idelay
Vref IFB 0.9mA
OSC
4 D1 0.3k D2 2.5R + Vfb*
SenseFET
3mA
KA431
R
Gate driver
6 RLI M
-
Power Down 25uA Vstop=8V
Power Up
VSD
OLP
Rsense
VCC Vstart=12V Vz
Figure 18. Pulse Width Modulation (PWM) Circuit
Figure 17. Relation Between Operating Supply Current and Vcc Voltage
The minimum current supplied through the startup resistor is given by 10
FSCM0765R
2.2 Leading Edge Blanking (LEB): At the instant the internal SenseFET is turned on, there usually exists a high current spike through the SenseFET, caused by primary-side capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the Rsense resistor can lead to incorrect feedback operation in the current mode PWM control. To counter this effect, the FSCM0765R employs a leading edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time (TLEB) after the SenseFET is turned on. 3. Protection Circuit: The FSCM0765R has several self protective functions such as over load protection (OLP), over voltage protection (OVP) and thermal shutdown (TSD). Because these protection circuits are fully integrated into the IC without external components, the reliability can be improved without increasing cost. Once the fault condition occurs, switching is terminated and the SenseFET remains off. This causes Vcc to fall. When Vcc reaches the UVLO stop voltage of 8V, the current consumed by the FSCM0765R decreases to the startup current (typically 25uA) and the current supplied from the DC link charges the external capacitor (Ca) that is connected to the Vcc pin. When Vcc reaches the start voltage of 12V, the FSCM0765R resumes its normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated (see Figure 19).
To avoid this undesired operation, the over load protection circuit is designed to be activated after a specified time to determine whether it is a transient situation or an overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current through the SenseFET is limited, and therefore the maximum input power is restricted with a given input voltage. If the output consumes beyond this maximum power, the output voltage (Vo) decreases below the set voltage. This reduces the current through the opto-coupler LED, which also reduces the optocoupler transistor current, thus increasing the feedback voltage (Vfb). If Vfb exceeds 2.5V, D1 is blocked and the 5.3uA current source (Idelay) starts to charge CB slowly up to Vcc. In this condition, Vfb continues increasing until it reaches 6V, when the switching operation is terminated as shown in Figure 20. The delay time for shutdown is the time required to charge CB from 2.5V to 6.0V with 5.3uA (Idelay). In general, a 10 ~ 50 ms delay time is typical for most applications.
V FB Over Load Protection
6.0V
2.5V
Fault occurs
Vds
Power on
Fault removed
T 12 = Cfb*(6.0-2.5)/Idelay
T1
T2
t
Figure 20. Over Load Protection
Vcc
12V 8V
t
Normal Operation Fault Situation Normal Operation
Figure 19. Auto Restart Operation
3.1 Over Load Protection (OLP): Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, even when the SMPS is in the normal operation, the over load protection circuit can be activated during the load transition.
3.2 Over Voltage Protection (OVP): If the secondary side feedback circuit were to malfunction or a solder defect caused an open in the feedback path, the current through the opto-coupler transistor becomes almost zero. Then, Vfb climbs up in a similar manner to the over load situation, forcing the preset maximum current to be supplied to the SMPS until the over load protection is activated. Because more energy than required is provided to the output, the output voltage may exceed the rated voltage before the over load protection is activated, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an over voltage protection (OVP) circuit is employed. In general, Vcc is proportional to the output voltage and the FSCM0765R uses Vcc instead of directly monitoring the output voltage. If VCC exceeds 19V, an OVP circuit is activated resulting in the termination of the switching operation. To avoid undesired activation of OVP during normal operation, Vcc should be designed to be below 19V.
11
FSCM0765R
3.3 Thermal Shutdown (TSD): The SenseFET and the control IC are built in one package. This makes it easy for the control IC to detect the heat generation from the SenseFET. When the temperature exceeds approximately 145C, the thermal protection is triggered resulting in shutdown of the FPS. 4. Frequency Modulation: EMI reduction can be accomplished by modulating the switching frequency of a switched power supply. Frequency modulation can reduce EMI by spreading the energy over a wider frequency range than the band width measured by the EMI test equipment. The amount of EMI reduction is directly related to the depth of the reference frequency. As can be seen in Figure 21, the frequency changes from 63KHz to 69KHz in 4ms.
feedback voltage drops below VBL (300mV). At this point switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes VBH (500mV), switching resumes. The feedback voltage then falls, and the process repeats. Burst mode operation alternately enables and disables switching of the power SenseFET, thereby reducing switching loss in standby mode.
Vo
Voset
VFB
0.5V
Drain Current
0.3V
Ids
Ts
Ts
Vds
Ts fs
69kHz 66kHz 63kHz
Switching disabled
time
T1 T2 T3
Switching disabled
T4
Figure 22. Waveforms of Burst Operation
4ms
t
Figure 21. Frequency Modulation
5. Soft Start: The FSCM0765R has an internal soft start circuit that increases PWM comparator inverting input voltage together with the SenseFET current slowly after it starts up. The typical soft start time is 15ms. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, rectifier diodes and capacitors. The voltage on the output capacitors is progressively increased with the intention of smoothly establishing the required output voltage. Preventing transformer saturation and reducing stress on the secondary diode during start up is also helpful. 6. Burst Operation: To minimize power dissipation in standby mode, the FSCM0765R enters into burst mode operation at light load condition. As the load decreases, the feedback voltage decreases. As shown in Figure 22, the device automatically enters into burst mode when the 12
FSCM0765R
Typical application circuit
Application LCD Monitor Output Power 40W Input Voltage Universal Input (85-265Vac) Output Voltage (Max Current) 5V (2.0A) 12V (2.5A)
Features
* * * * * * High efficiency (>81% at 85Vac input) Low standby mode power consumption (<1W at 240Vac input and 0.4W load) Low component count Enhanced system reliability through various protection functions Low EMI through frequency modulation Internal soft-start (15ms)
Key Design Notes
* Resistors R102 and R105 are employed to prevent start-up at low input voltage * The delay time for over load protection is designed to be about 50ms with C106 of 47nF. If a faster triggering of OLP is required, C106 can be reduced to 22nF.
1. Schematic
D202 T1 EER3016 MBRF10100 R102 500k R103 56k 2W C104 2.2nF 1kV D101 UF 4007 R105 500k 3 1 10 C201 1000uF 25V 8
L20 1 C202 1000u F 25V 12V, 2.5A
2
C103 100uF 400V BD101 2 2KBP06M3N257 1 3 R106 5k 1/4W 4 C102 220nF 275VA C C106 47nF 50V
FSCM0765R 6 Ilimit 5 N.C 4 Vf b GND 2 Vcc 3 ZD10 1 22V C105 D102 22uF TVR10G 50V R104 5 4 Drain 1 D201 MBRF1045 7 C203 1000uF 10V 5 6 L20 2 5V, 2A C204 1000u F 10V
LF101 23mH
C301 4.7n F
R201 1k R101 560k 1W R204 5.6k R203 10k C205 47nF
R202 1.2k IC301 H11A817A
RT1 5D-9
C101 220nF 275VA C
F1 FUSE 250V 2A
IC201 KA431
R205 5.6k
Figure 23. Demo Circuit
13
FSCM0765R
2. Transformer
EER3016 Np/2 Np/2 1 10 N 9 8
12V
2 3
4 Na 5
7 6
N5V
Figure 24. Transformer Schematic Diagram
3.Winding Specification
No Na Np/2 N12V N5V Np/2
Pin (sf) 45 21 10 8 76 32
Wire 0.2 x1
Turns 8 18 7 3 18
Winding Method Center Winding Solenoid Winding Center Winding Center Winding Solenoid Winding
Insulation: Polyester Tape t = 0.050mm, 2Layers 0.4 x 1 0.3 x 3 0.3 x 3 0.4 x 1 Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Outer Insulation: Polyester Tape t = 0.050mm, 2Layers
4.Electrical Characteristics
Pin Inductance Leakage Inductance 1-3 1-3
Specification 520uH 10% 10uH Max
Remarks 100kHz, 1V 2nd all Short
5. Core & Bobbin Core: EER 3016 Bobbin: EER3016 Ae(mm2): 96
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FSCM0765R
6. Demo Circuit Part List
Part F101 RT101 R101 R102 R103 R104 R105 R106 R201 R202 R203 R204 R205
Value Fuse 2A/250V NTC 5D-9 Resistor 560K 500K 56K 5 500K 5K 1K 10K 1.2K 5.6K 5.6K Capacitor
Note
Part C301
Value 4.7nF Inductor
Note Polyester Film Cap.
L201 L202 1W 1/4W 2W 1/4W 1/4W 1/4W 1/4W 1/4W 1/4W 1/4W 1/4W BD101 D101 D102 D201 D202
5uH 5uH
Wire 1.2mm Wire 1.2mm
Diode UF4007 TVR10G MBRF1045 MBRF10100
Bridge Diode 2KBP06M 3N257 Line Filter LF101 IC101 IC201 IC301 23mH IC FSCM0765R KA431(TL431) H11A817A FPSTM Voltage Reference Opto-coupler Wire 0.4mm Bridge Diode
C101 C102 C103 C104 C105 C106 C201 C202 C203 C204 C205
220nF/275VAC 220nF/275VAC 100uF/400V 10nF/1kV 22uF/50V 47nF/50V 1000uF/25V 1000uF/25V 1000uF/10V 1000uF/10V 47nF/50V
Box Capacitor Box Capacitor Electrolytic Capacitor Ceramic Capacitor Electrolytic Capacitor Ceramic Capacitor Electrolytic Capacitor Electrolytic Capacitor Electrolytic Capacitor Electrolytic Capacitor Ceramic Capacitor
15
FSCM0765R
Package Dimensions
D2-PAK-6L
A 1.40 1.00 10.10 9.70 MIN 9.50
9.40 9.00
MIN 9.00
(0.75) 5.10 4.70 MAX1.10
MAX0.80 0.70 0.50
10.00 MIN 4.00
2.19 1.27
1.75
MIN 0.85 2.19 1.27
3.81
1.75
10.20 9.80 (8.58) (4.40) R0.45
B 4.70 4.30 1.40 1.25
(1.75)
(0.90)
(7.20) 15.60 15.00 SEE DETAIL A
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE DOES NOT COMPLY TO ANY CURRENT PACKAGING STANDARD. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. D) DIMENSIONS AND TOLERANCES PER ASME Y14.5M-1994
16
FSCM0765R
Package Dimensions (Continued)
I2-PAK-6L (Forming)
17
FSCM0765R
Package Dimensions (Continued)
Dimensions in Millimeters
TO-220-6L (Forming)
4.70 4.30 10.10 9.70 2.90 2.70 1.40 1.25
15.90 15.50 9.40 9.00
20.00 19.00
(13.55) 23.80 23.20
R0.55 (0.75) R0.55 8.30 MAX1.10 7.30 MAX0.80 0.70 0.50 0.60 0.45 3.48 2.88
(0.65)
2.60 2.20 (7.15)
2.19
1.75 1.27 3.81
10.20 9.80
18
FSCM0765R
Ordering Information
Product Number FSCM0765RJ FSCM0765RIWDTU FSCM0765RGWDTU Package D2-PAK-6L I2-PAK-6L TO-220-6L CM0765R 650V 1.6 Marking Code BVdss Rds(on) Max.
19
FSCM0765R
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 12/15/05 0.0m 001 (c) 2004 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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